This invention relates, in general, to electronics, and more particularly, to electronic components and methods of manufacture.
Systems for sensing inertia are often comprised of two chips. The first chip contains the inertial sensing device, and the second chip contains the control circuitry. However, these two chip inertial sensing systems have several problems. For example, these systems have poor signal-to-noise ratio performance. Furthermore, these systems also have a large parasitic capacitance resulting from the interconnection of the two chips.
Recently, the two chip inertial sensing systems have been integrated into a single chip, or monolithic, system. These monolithic systems have a higher signal-to-noise ratio performance versus the two chip inertial sensing systems. The improved signal-to-noise ratio enables the construction of a low g inertial sensor or yaw rate sensor. These monolithic systems also reduce the parasitic capacitance of the interconnection between the control circuitry and the inertial sensing device.
In these monolithic systems, the inertial sensing device, or the transducer, is located on the same surface of the substrate as the control circuitry. This configuration places significant constraints on the construction of the control circuitry and the transducer. Some of these constraints limit the size and performance of the transducer. For example, one typical constraint limits the thickness of the movable portion of the transducer. Other constraints limit the size and functionality of the devices in the control circuitry.
Accordingly, a need exists for an improved monolithic system or electronic component that has fewer constraints to limit the size and functionality of the transducer and the devices of the control circuitry.